THE HARDWARE

The system was designed for and implemented on a CDC 6400, with Extended Core Store (ECS) and Central Exchange Jump [C1]. The machine had 32K 60 bit words of Central Memory (CM), and 300K 60 bit words of Extended Core Store (ECS). The 6400 CPU has about 25 hardware registers. It can perform register to register actions in about half a microsecond, and is capable of fetching two words from memory, adding them and storing the result in about four microseconds. ECS was that feature of the hardware which had the most direct influence on the project. This is 500K 60 bit words, which can be block transferred to or from CM. The CPU can start transfers between ECS and CM with an initial access time of about 3 microseconds, and a transfer rate of about 10 60 bit words per microsecond. A transfer can be started at any word address in ECS or CM and can be of any length, as small as one word. The protection machinery supplied by the hardware consists of a pair of registers: a relocation register and a bounds register. One such pair is supplied for central memory and a second pair for ECS. There is no other address mapping available. Our 6400 CPU had a special instruction, central exchange jump (CEJ) [see revision M of C1]. This instruction causes an exchange of the contents of all hardware registers with the contents of some region in CM. This requires about 3 microseconds. The changed registers include the base and bounds registers. (The same action is available on standard 6400, initiated from outside the CPU.) The CPU has two modes, monitor and user. This mode controls the location from which the registers will be loaded during a CEJ. In monitor mode the CEJ instruction contains the absolute address of the new register contents, while in user mode the address is taken from a register loaded during the previous CEJ. Supporting the CPU and providing access to I-O devices are ten Peripheral Processing Units (PPU's). Each PPU is a computer with a 4K 12 bit word memory and a single 18 bit register. It can pick up two 12 bit words, add them, and store the result in 9 microseconds. This time is extended to 12 microseconds if the addresses are formed by indexing, the usual case. Each PPU can access CM at about 5 microseconds per 60 bit word. Aside from magnetic tape, the only auxiliary storage (on our machine) was provided by one half of a 6638 disk. This one half could store about seven million 60 bit words. The disk rotation time was 52 milliseconds and the maximum positioning time was 110 milliseconds. The data could be transfered to a PPU at the rate of 12 bits per microsecond. At the time the 6400 was purchased there was no suitable hardware available to connect large numbers of individual user terminals. Therefore, the computer center designed and constructed a multiplexor capable of handling a maximum of 256 individual teletypes.