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User programs that needed access to amounts of data larger than the
amount that could be swapped into central memory would use some form
of access to data stored in ECS. (Eventually called ECS files, see
next chapter.) This data stored in ECS could then be used as an I-O
buffer. Programs which desired access to this data would read it while
they were running in central memory.
Data from an input-output device would first go to a PPU. The PPU
would transfer the data to a central memory buffer and start a system
program in central memory, which would transfer the data to ECS. This
system program would then inform the appropriate requesting program
that the data was available. (The requesting program was informed by
sending an event on an event channel, see next chapter.) Movement in
the opposite direction was similar.
We made rough estimates of the amount of CPU time that would be used
by the system programs to move the data to and from ECS. We assumed
that the main I-O load would come from the disk. If we assumed that
two PPU's were alternately reading the disk and then writing into
central memory, central would receive words at the maximum rate of one
word every five microseconds. If enough were buffered so that the main
cost to the central program was the actual transfer to ECS, the
central program would use one microsecond every 50. Thus, we felt this
time overhead was acceptable.
We gave less thought to the space overhead. However, at 512 words per
PPU (the maximum power-of-2 buffer that a PPU could hold), there would
be at most 5120 words of central. On a 64K machine (which we assumed
would be available for such a large system) this is less than 10
the total space, which we thought would be acceptable. If this was too
much, we could arrange for the PPU's to transfer a 512 word buffer in
several sections, with a separate request to central memory system
program for each one. This would reduce the necessary buffer space in
central memory at an increased cost for CPU time, due to overhead in
responding to each request.
As an alternative to this design with central memory buffers, CDC
offered an optional hardware feature which permitted direct exchange
of data between a PPU and ECS [C2]. We referred to this feature as a
``Back-door''. Unfortunately, the rate of this transfer was limited,
by the PPU, to one 60 bit word every 5 microseconds, and while in
progress degraded the transfer rate between central memory and ECS. We
were unable to determine from CDC how great the degradation would be,
but there were hints it might be a factor of two. Since our estimates
of program swapping overhead were heavily dependent on a high transfer
rate between central memory and ECS, and the estimates for the
PPU-CM-ECS scheme indicated a low overhead, we decided to avoid the
Back door.
Next: Layers
Up: BASIC ARCHITECTURAL CONSIDERATIONS
Previous: Swapping
Paul McJones
1998-06-22